uart_emu Entity Reference

Emulates an UART receiver. Writes receiver characters to a file. More...

Detailed Description

Emulates an UART receiver. Writes receiver characters to a file.

Waits for uart_input to leave rest state, and extracts data from the serial line, performing some sanity checks. If PARITY is either "even" or "odd", parity is also extracted from the serial line and checked against the expected value. In the case of a parity mismatch, an error will be printed in the simulation log. Received characters will be printed in OUTPUT_FILE state of the leds each time any the input bit changes. Does not keep any internal memory, led_input is assumed to be directly connected to the leds.

Definition at line 31 of file uart_emu.vhd.

Entities
uart_emu_arch	architecture
	Architecture is based on just a single process. More...

Libraries
ieee
	Use IEEE standard definitions library.

Use Clauses
std_logic_1164
	Use std_logic* signal types.
numeric_std
	Use arithmetic operations and unsigned types.
txt_util	Package <txt_util>
	Use the chr function to convert integer to char.
textio
	Include datatypes and procedures needed to write to files.
vhdl_verification	Package <vhdl_verification>
	Use the slv2string function present in the vhdl_verification package.

Generics
OUTPUT_FILE	string := " uart.log "
	File where received chars will be written.
VERBOSE	boolean := false
	Log beginning and end of transactions, as well as individual bit values.
DATA_BITS	integer := 8
	Number of data bits in the UART word.
PARITY	string := " none "
	Can be either "even", "odd", or "none".
BIT_DURATION	time := 104 us
	Duration of each bit, depends on baudrate (it is actually 1 second / baudrate)
STOP_BITS	integer := 1
	Can be either 1 or 2.

Ports
uart_input	in std_logic
	Connect here the TX signal from your design.

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The documentation for this class was generated from the following file:

• src/uart_emu.vhd