datawrite Entity Reference

Writes circuit output data to file. More...

Detailed Description

Writes circuit output data to file.

Creates (overwriting if it exists) a file at OUTPUT_FILE, writing OUTPUT_NIBBLES chars in each line. Data will be written in hex format: 4 bits per character (nibble). Reads DATA_WIDTH - bit input data and internally reorders it to form complete lines. data is only sampled when valid is active.

Definition at line 29 of file datawrite.vhd.

Entities
pack_lines_and_write	architecture
	Architecture accumulates input data in a vector which will be written to the output file. More...

Libraries
ieee
	Use IEEE standard definitions library.

Use Clauses
std_logic_1164
	Use std_logic* signal types.
numeric_std
	Allows use of arithmetical operations between integers and vectors.
textio
std_logic_textio
txt_util	Package <txt_util>

Generics
SIMULATION_LABEL	string := " datawrite "
	Allow to separate messages from different instances in SIMULATION.
VERBOSE	boolean := false
	Print more internal details.
DEBUG	boolean := false
	Print debug info (developers only)
OUTPUT_FILE	string := " ./output/datawrite_test.txt "
	File where data will be stored.
OUTPUT_NIBBLES	integer := 2
	Hex chars on each output line.
DATA_WIDTH	integer := 8
	Width of input data.

Ports
clk	in std_logic
	Will sample input on rising_edge of this clock.
data	in std_logic_vector ( DATA_WIDTH - 1 downto 0 )
	Data to write to file.
valid	in std_logic
	Active high, indicates data is valid.
endsim	in std_logic
	Active high, tells the process to close its open files.

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The documentation for this class was generated from the following file:

• src/datawrite.vhd