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VHDL-verification
Package to ease directed testing of HDL entities
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Architecture is based on just a single process. More...
Architecture is based on just a single process.
An assertion has also been added to check that ACTIVE_VALUE is set to a non-ambiguous strong value (either '0' or '1').
Definition at line 34 of file led_emu.vhd.
Processes | |
| PROCESS_1 | ( led_input ) |
Report led state each time there is an event in led_input. | |
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Process |
Report led state each time there is an event in led_input.
We don't actually need to check for led_input'event, since putting led_input in the sensitivity list of the process does it for us. We use the report statement to print a string to the simulation log, and the slv2string function in the vhdl_verification package to convert the std_logic_vector value to a printable string.
Definition at line 50 of file led_emu.vhd.
1.8.13