Revision 3
; Created by bitgen M.53d at Wed Aug 27 16:53:59 2014
; Bit lines have the following form:
; <offset> <frame address> <frame offset> <information>
; <information> may be zero or more <kw>=<value> pairs
; Block=<blockname     specifies the block associated with this
;                      memory cell.
;
; Latch=<name>         specifies the latch associated with this memory cell.
;
; Net=<netname>        specifies the user net associated with this
;                      memory cell.
;
; COMPARE=[YES | NO]   specifies whether or not it is appropriate
;                      to compare this bit position between a
;                      "program" and a "readback" bitstream.
;                      If not present the default is NO.
;
; Ram=<ram id>:<bit>   This is used in cases where a CLB function
; Rom=<ram id>:<bit>   generator is used as RAM (or ROM).  <Ram id>
;                      will be either 'F', 'G', or 'M', indicating
;                      that it is part of a single F or G function
;                      generator used as RAM, or as a single RAM
;                      (or ROM) built from both F and G.  <Bit> is
;                      a decimal number.
;
; Info lines have the following form:
; Info <name>=<value>  specifies a bit associated with the LCA
;                      configuration options, and the value of
;                      that bit.  The names of these bits may have
;                      special meaning to software reading the .ll file.
;
Info STARTSEL0=1
Info Persist=1
Info Readback=Used
Bit  1172301 0x00000c1d    685 Block=K12 Latch=I Net=rst_high_IBUF
Bit  1172338 0x00000c1d    722 Block=K13 Latch=I Net=enable_IBUF
Bit  3538642 0x00008c1d    178 Block=J20 Latch=I Net=clk_BUFGP/IBUFG
Bit  7146889 0x00018023    425 Block=D26 Latch=O Net=reg<0>
Bit  7146934 0x00018023    470 Block=B28 Latch=O Net=reg<1>
Bit  7146953 0x00018023    489 Block=C29 Latch=O Net=reg<2>
Bit  7146998 0x00018023    534 Block=C25 Latch=O Net=reg<3>
Bit  7147081 0x00018023    617 Block=B27 Latch=O Net=reg<4>
Bit  7147158 0x00018023    694 Block=A25 Latch=O Net=reg<5>
Bit  7147177 0x00018023    713 Block=B26 Latch=O Net=reg<6>
Bit  7147222 0x00018023    758 Block=D25 Latch=O Net=reg<7>
Bit  7533979 0x0001841e    475 Block=SLICE_X13Y147 Latch=BQ Net=reg<1>
Bit  7534043 0x0001841e    539 Block=SLICE_X13Y148 Latch=BQ Net=reg<5>
Bit  7535266 0x0001841f    450 Block=SLICE_X13Y147 Latch=AQ Net=reg<0>
Bit  7535303 0x0001841f    487 Block=SLICE_X13Y147 Latch=CQ Net=reg<2>
Bit  7535325 0x0001841f    509 Block=SLICE_X13Y147 Latch=DQ Net=reg<3>
Bit  7535330 0x0001841f    514 Block=SLICE_X13Y148 Latch=AQ Net=reg<4>
Bit  7535367 0x0001841f    551 Block=SLICE_X13Y148 Latch=CQ Net=reg<6>
Bit  7535389 0x0001841f    573 Block=SLICE_X13Y148 Latch=DQ Net=reg<7>