all: top.bin # Use "make -n target" to see which commands will be executed #target: dependencia1 dependencia2 # proceso (para generar target en funciĆ³n de las dependencias) sim: tb_vgadriver.ghw # Analyze vhdl sources # %, $@, $^, $< are explained in: https://web.mit.edu/gnu/doc/html/make_10.html#SEC94 # $< es la primera dependencia # $@ es el target # $^ es la lista de dependencias %.o: %.vhd ghdl -a $< # Generate simulation executable tb_vgadriver: contador.o comparador.o dibuja.o vgadriver.o tb_vgadriver.o ghdl -e tb_vgadriver # Generate simulation waveform tb_vgadriver.ghw: tb_vgadriver ./tb_vgadriver --wave=tb_vgadriver.ghw # Open gtkwave view: tb_vgadriver.ghw gtkwave tb_vgadriver.ghw # Synthesize top.json: top.vhd contador.vhd comparador.vhd dibuja.vhd vgadriver.vhd yosys -m ghdl -p 'ghdl contador.vhd comparador.vhd dibuja.vhd vgadriver.vhd top.vhd -e top; synth_ice40 -json top.json' # Place and route top.asc: top.json top.pcf nextpnr-ice40 --up5k --package sg48 --freq 50 --pcf top.pcf --json top.json --asc top.asc # Bitstream generation top.bin: top.asc icepack top.asc top.bin # An example of how we can make a rule generic: # #%.bin: %.asc # icepack $< $@ # Configure the FPGA prog: top.bin iceprog top.bin # Clean: clean: rm -f *.json *.asc *.bin rm -f *.o work-obj??.cf rm -f tb_vgadriver tb_vgadriver.ghw .PHONY: all prog clean