top_key Project Status
Project File:	generador_clave_completo.xise	Parser Errors:	No Errors
Module Name:	top_key	Implementation State:	New
Target Device:	xc3s200-5ft256	Errors:
Product Version:	ISE 13.1	Warnings:
Design Goal:	Balanced	Routing Results:
Design Strategy:	Xilinx Default (unlocked)	Timing Constraints:
Environment:		Final Timing Score:

 

Detailed Reports						[-]
Report Name	Status	Generated	Errors	Warnings	Infos
Synthesis Report
Translation Report
Map Report
Place and Route Report
Power Report
Post-PAR Static Timing Report
Bitgen Report

 

Secondary Reports			[-]
Report Name	Status	Generated
ISIM Simulator Log	Current	vie 8. ago 19:25:37 2014

Date Generated: 08/08/2014 - 19:27:50