library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
use IEEE.NUMERIC_STD.ALL;

entity contador is
    Port ( rst : in  STD_LOGIC;
           clk : in  STD_LOGIC;
           enable : in  STD_LOGIC;
           cuenta : out  STD_LOGIC_VECTOR (7 downto 0));
end contador;

architecture Behavioral of contador is

  signal cont, p_cont: unsigned(7 downto 0);

begin

  cuenta <= std_logic_vector(cont);
  
  comb: process(enable, cont)
  begin
    if enable = '1' then
	   p_cont <= cont+1;
	 else
	   p_cont <= cont;
	 end if;
  end process;
  
  sinc: process(rst, clk)
  begin
    if rst='1' then
	   cont <= "00000000";  -- (others => '0');
	 elsif rising_edge(clk) then
      cont <= p_cont;
    end if;		
  end process;
  
  


end Behavioral;